Printer Friendly Version

MILPITAS, Calif. and HILLSBORO, Ore., Nov. 21 /PRNewswire/ -- LSI Logic Corporation (NYSE: LSI) and Endeavor Intertech Corporation today jointly announced the availability of co-verification solutions for LSI Logic's ZSP(TM) core architecture. Endeavor Intertech, one of LSI Logic's founding ZSP Solutions Partners, supplies a key component in the group's strategy to offer the most advanced and complete suite of digital signal processing solutions for the communications market.

The result of this collaboration is an array of ZSP co-simulation solutions for a wide range of hardware designer needs. These include a complete processor support package for Mentor Graphics Seamless® CVE, and a direct-to-RTL co-simulating instruction set model.

``Endeavor's innovative approach to co-simulation provides the greatest amount of flexibility for our ZSP core customers,'' said Giuseppe Staffaroni, vice president and general manager of LSI Logic's Broadband Communications Division. ``By providing a choice in co-verification, LSI Logic customers can choose a mixture of feature-rich environment seats and budget co-simulating model seats, depending on their testing requirements. Either way, designers are able to verify their ZSP core with the final hardware components and unmodified target software. This significantly reduces the physical test and integration phase for ZSP customers.''

The ZSP core instruction set model is fully integrated into the Mentor Seamless CVE's environment, allowing LSI Logic customers who use co-simulation the ability to take full advantage of Seamless' coherent memory management and optimization algorithms. Alternatively, Endeavor Intertech's direct co-simulating model technology allows the ZSP instruction set model to communicate directly with most VHDL and Verilog hardware simulators over a high-throughput pipe, without an additional tool in the tool chain.

``The beauty of the direct-to-RTL co-simulating model is its simplicity,'' offered Dan Budge, vice president of technology at Endeavor Intertech. ``Just pop the ZSP instruction set model into your design, and you are co-simulating -- simple. And you still have all the debugging capabilities and basic performance advantages that you would expect from co-verification.''

Digital signal processors are one of the fastest growing segments in the global chip market. LSI Logic's ZSP open architecture offers both a licensable core as well as standard products for an array of DSP applications and can be supported by a growing list of software vendors. To find out more about the licensable ZSP CoreWare® architecture and Solution Partner Programs, visit the website at http://www.zsp.com or email dsp-mkt@zsp.com.

About Endeavor Intertech Corporation

Endeavor Intertech develops IPSim(TM) Precyse(TM), a world-class high performance, cycle-precise instruction set and intellectual property simulator that can be applied to hardware/software co-verification, co-design, or as standalone instruction set simulators for software developers. Endeavor Intertech also develops IPSim CoOperate(TM), a tool that turns Precyse simulators, as well as customer pin-aware simulators, into co-simulating models. Endeavor Intertech develops these and other software tools for DSP, VLIW, RISC, and other embedded cores and processors for its EDA and processor design customers.

For more information on Endeavor Intertech's high performance, cycle-accurate simulation and co-verification products, please contact your Endeavor Intertech representative at info@endeav.com, or 503-628-6200. See Endeavor Intertech on the web at http://www.endeav.com .

About LSI Logic

LSI Logic Corporation is a leading supplier of communications chips for broadband, data networking, wireless and set-top box applications. In addition, the Company provides chips and boards for network computing and supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1551 McCarthy Boulevard, Milpitas, CA 95035, 408-433-8000, http://www.lsilogic.com .

NOTES TO EDITOR: All LSI Logic new releases (financial, acquisitions, manufacturing, products, technology etc.) are issued exclusively by PR Newswire and are immediately thereafter posted on the company's external website, http://www.lsilogic.com . The LSI Logic logo design is a registered trademark of LSI Logic Corporation. ZSP is a trademark of LSI Logic Corporation. IPSim, Precyse, and CoOperate are trademarks of Endeavor Intertech Corporation. Other brands and products referenced herein are the trademarks or registered trademarks of their respective holders.